J518 ELV Module Emulator 9S12DG 128/256 CPU Operation Tutorials

J518 ELV Module Emulator 9S12DG 128/256 CPU Operation Tutorials:

If you reading and programming the original car, the details steps just check the VVDI Prog Operation Guide.

If your car is 9S12DG 128 CPU, the operation steps are as follows:

Read out the EEPROM data, atttention! pls save the data! in case of any wrong operation

Put the read EEPROM file into the folder

Then double-click the EEPROM Converter application,

and see that the original 2K file becomes 4K, the conversion is successful.

After runing the sytem, the file to be 4K, then the programming succeed

Note: Can only double click one time, do not repeat.If the double-click run is unsuccessful, or no 4K file appears, then right-key to run the program in administrator mode.

Connect flashing wire and write the converted EEPROM file.Attention: simulator is a 256 chip then choose J518 (2010) (0L01Y) required.

Each board all with ep data and FLSAH data, so usually you just need to write EP data.If not, you can write the EP data from your car with the FLASH data in the instruction.

If car is 9S12DG 256 CPU, the operation steps are as follows:

Read out and save the original car data, and write it directly to the simulator.

wiring method

VVDI burning line: where: red (thick) =VCC black (thick) =GND yellow =RST purple =BKGD green =XCLKS White =CLK black (fine) =GND-C

without horn

With horn: wiring according to the silk print in the board ,same as board wihtout horn

Buy our special burning line, with speakers can be no welding burning, directly into the 20pin port.

Notice:

The simulator is burned after the test, preferably on the car.

In the test platform test, it is necessary to pay attention to check the wiring of 20Pin port. Some of the platform wiring harness production problems, which will conflict with our burning interface, which may lead to chip damage.

Error wiring: 10 (red) should recover after 20 (blue) or as shown in the figure.